In recent years, the number and variety of content creation services available to consumers has increased dramatically. Consumers can now receive hundreds of program channels via satellite, cable, public data networks such as the Internet, private data networks, and wireless telephony networks. As a result, consumers are demanding receivers that can handle data from a variety of multimedia sources. In addition, the sophistication of applications driven by these services requires precise timing to be maintained between transmitters and receivers.
In many multimedia applications, the receiving system uses a system time clock that is independent of the system time clock of the transmitting system. Because these system time clocks are asynchronous, the receiver clock may run at a slightly different rate than the transmitter clock. For example, when the receiver clock runs slower than the transmitter clock, data packets arrive faster than the receiver processes them causing the input buffer to overflow. In addition, the lack of precise timing between the transmitter and receiver creates deleterious effects on video display such as lack of synchronization between video and audio.
One common technique to minimize the impact of these timing errors is to synchronize the system time clock of the receiver to the system time clock of the transmitting device. A conventional system 100 for performing this synchronization is shown in FIG. 1. System 100 includes one or more transmitters 110, a communications network 120 for transporting data packets, and a receiver 130. Each transmitter 110 has a system time clock 112 and a transmission module 114. Receiver 130 includes a processor 134 for receiving and processing data packets, a system time clock 132, and a clock recovery module 136.
Transmission module 114 generates a stream of data packets. The format of the transmission stream is defined by the technology supported by the transmitting and receiving system. Periodically, the transmission module will insert a clock reference value in the data packet being transmitted. In MPEG standards, this clock reference value is referred to as the program clock reference (PCR). The clock reference value represents the value of the transmitter system time clock at the time of insertion into the data packet. The clock recovery module 136 utilizes the clock reference values to synchronize the receiver system time clock to the transmitter system time clock.
This clock “locking” technique reduces timing errors associated with data packets from the transmitter on which the receiver clock is locked. However, in modern systems, data from multiple transmission sources (for example, multiple programs) are often multiplexed together in a single transport stream. The receiving system is able to synchronize to the system time clock of only one of these transmission sources. As a result, the data streams from the other transmission sources having different system time clocks are susceptible to the timing errors discussed above.
In addition, while being processed by the receiver, data packets may experience delay. This internal receiver delay introduces error into the clock reference values being forwarded to the downstream systems and applications. This error impacts the ability of the downstream system or application to synchronize its system time clock with the system time clock of the original transmitting system. FIG. 2 may be used to illustrate the impact of internal delay on the clock reference value. Time line 202 represents the relative times when packet A 210 and packet B 220 were received by the media processing system. Packet A 210 contains a clock reference value of 10. Packet B 220 contains a clock reference value of 14. Time line 250 represents the relative times when packet A and packet B were transmitted by the media processing system. Packet A is being transmitted at the same relative time, 10, as the clock reference value. However, packet B experiences delay in the system and is being transmitted at relative time 15. However, the clock reference value of that packet still indicates 14. Thus, a downstream system with a clock recovery module will be unable to accurately synchronize its clock because of the delay introduced.
A need therefore exists for a media processing system that can reduce timing errors caused by receiving and processing data packets from multiple disparate program transmitting devices.
A need further exists to minimize the impact of delays created within the media processing system while processing data packets from multiple disparate program transmitting devices.